1. Field of the Invention
The present invention relates to a method of forming an oxide layer and a method of forming a capacitor of a semiconductor device using such an oxide layer as the dielectric, and more particularly, to a method of forming an oxide layer using an atomic layer deposition (ALD) method and a method of forming a capacitor of a semiconductor device using the same.
2. Description of the Related Art
As the demand for highly integrated semiconductor devices having high operating speeds has continued to increase, the surface area of the semiconductor substrate dedicated to each memory cell has been gradually reduced. As the area of the memory cells is reduced, the horizontal area available for forming the transistor(s) and/or capacitor(s) included in each memory cell has also been reduced.
When the length of a gate electrode of the transistor is reduced, the thickness of the corresponding gate insulation layer is typically also reduced (for example to a thickness of about 20 Å or less). However, reducing the thickness of the gate insulation layer can result in several problems, such as increased gate leakage current, penetration of the gate by dopants or other impurities, reduced threshold voltages, etc. Accordingly, research to identify gate insulation layers having improved insulating characteristics and higher dielectric constants is ongoing.
In addition, as the region for forming the capacitor is reduced, cell capacitance also decreases. When the cell capacitance decreases, the readability of data stored in the memory cell deteriorates, the likelihood of soft errors increases and the memory device becomes difficult to operate satisfactorily at low voltage. Therefore, various methods for increasing the cell capacitance without changing the horizontal surface area occupied by the cell are under development.
Methods suggested for increasing the capacitance that can be achieved within a limited cell area have included reducing the thickness of the dielectric layer and/or forming the lower electrode in a three-dimensional shape such as a cylinder or pin to increase the effective area of the capacitor. However, when manufacturing a dynamic random access memory (DRAM) having a degree of integration necessary to achieve a capacity of about one gigabit or more, it is difficult to achieve a sufficiently high capacitance by employing the suggested methods. To solve this problem, additional research on forming dielectric layers using a material having an increased dielectric coefficient (κ) is ongoing.
In particular, methods of forming the gate insulation layer of a transistor and/or the dielectric layer of a capacitor using oxides such as Ta2O5, Y2O3, HfO2, ZrO2, Nb2O5, BaTiO3 and SrTiO3 have been developed. The energy band gaps and dielectric constants of these materials are graphically illustrated in FIG. 1.
Generally, a thin layer such as a dielectric layer may be formed by a deposition method such as a chemical vapor deposition (CVD) method, a low pressure chemical vapor deposition (LPCVD) method, a plasma-enhanced chemical vapor deposition (PECVD) method or a sputtering method. When using the above-described methods for forming the thin film, the deposition is typically preformed at a relatively high temperature. As a result, the semiconductor device may receive or incur an unfavorable thermal budget. In addition, thin films formed by the CVD methods tend to suffer from a degree of thickness non-uniformity and lower step coverage percentages than desired for highly integrated devices.
In contrast to CVD deposition methods, atomic layer deposition (ALD) methods can be implemented at lower temperatures, thereby reducing the thermal budget, while also providing improved uniformity and step coverage.
Recently, tantalum oxide (Ta2O5) having a dielectric constant of about 25 and good thermal stability has become more widely used for forming the dielectric layer of capacitors. However, because Ta2O5 has a relatively low energy band gap, a capacitor having a dielectric layer formed using Ta2O5 tends to exhibit a very high leakage current. As shown in FIG. 1, hafnium oxide (HfO2), which provides a dielectric constant of about 20 or more and also exhibits a relatively high energy band gap, may be used to form dielectric layers.
Exemplary methods for forming HfO2 layer are disclosed in U.S. Pat. No. 6,348,386 B1 issued to Gilmer and U.S. Pat. No. 6,420,279 B1 issued to Ono et al. U.S. Pat. No. 6,348,386 B1, discloses a method of forming an insulation layer on a substrate by reacting a first precursor including hafnium and iodine and a second precursor including oxygen. U.S. Pat. No. 6,420,279 B1, discloses a method of forming a nano-laminate of hafnium oxide and zirconium oxide using an ALD process and nitrate-based precursors such as hafnium nitrate and zirconium nitrate. However, according to these disclosures, achieving an HfO2 layer having good step coverage on structures having a high aspect ratio remain difficult.